pcix.library 51.6
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BoardObject 0x1400F944 Owner <Radeon>
Bridge <pci0> Bus 0 Dev 16 Function 0
 Vendor 0x1002 <Advanced Micro Devices, Inc. [AMD/ATI]> Device 0x4A48 <>
  Revision 0x0 Class 0x3 <Display controller>
  ProgInterface 0x0 <VGA controller>
  Command 0x7
   -> I/O Access
   -> Memory Access
   -> Bus Mastering
  Status 0x2B0
   -> Capabilities List
   -> 66 MHz Capable
   -> Fast Back-To-Back
  DevSel: Medium Devsel Speed
Cap_List: Head CapPtr 0x58
Cap_List: CapPtr 0x305002
Cap_List: CfgIndex 0x58
[0x2] AGP 3.0 Interface Version
 -> AGP 3.0 Core Specification Register Support
AGP Status Reg Offset 0x5C (0xFF00021B)
 -> RQ 255
 -> ARQSZ 0 (optimum request size = 2^(ARQSZ+4)
 -> CAL_Cycle 4ms
 -> Side Band Address Support
 -> Fast Write Support
 -> AGP 3.0 Mode
 -> Rate 4X/8X
AGP Command Reg Offset 0x60 (0x1F000302)
 -> PRQ Entries 31
 -> PARQSZ Entries 0 (optimum request size = 2^(ARQSZ+4)
 -> CAL_Cycle 4ms
 -> Side Band Address Support Enabled
 -> AGP Enabled
 -> AGP 3.0 Mode
 -> Rate 8X
Cap_List: CapPtr 0x6020001
Cap_List: CfgIndex 0x50
[0x1] PMC
 -> PME_Support 0x0
 -> D2_SupportFW
 -> D1_SupportFW
 -> Aux_Current 0x0
 -> Version 0x2
PMCSR
 -> Data_Scale 0x0
 -> Data_Select 0x0
 -> PowerState 0x0
PMCSR_BSE
Data 0x0
  IOBase: Address 0xEFFFF000
  Base 0: Address 0xDFFFF000 Size 0x10000000
  Base 2: Address 0xDFFEF000 Size 0x10000
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BoardObject 0x1400FAA4 Owner <>
Bridge <pci0> Bus 0 Dev 11 Function 0
 Vendor 0x106B <Apple Inc.> Device 0x59 <U3H AGP Bridge>
  Revision 0x0 Class 0x6 <Bridge>
  ProgInterface 0x0 <>
  Command 0x16
   -> Memory Access
   -> Bus Mastering
   -> Memory Write & Invalidate
  Status 0x2B0
   -> Capabilities List
   -> 66 MHz Capable
   -> Fast Back-To-Back
  DevSel: Medium Devsel Speed
Cap_List: Head CapPtr 0x80
Cap_List: CapPtr 0x300002
Cap_List: CfgIndex 0x80
[0x2] AGP 3.0 Interface Version
 -> AGP 3.0 Core Specification Register Support
AGP Status Reg Offset 0x84 (0x1F00027B)
 -> RQ 31
 -> ARQSZ 0 (optimum request size = 2^(ARQSZ+4)
 -> CAL_Cycle 4ms
 -> Side Band Address Support
 -> HTRANS Support
 -> > 4G Support
 -> Fast Write Support
 -> AGP 3.0 Mode
 -> Rate 4X/8X
AGP Command Reg Offset 0x88 (0x00000302)
 -> PRQ Entries 0
 -> PARQSZ Entries 0 (optimum request size = 2^(ARQSZ+4)
 -> CAL_Cycle 4ms
 -> Side Band Address Support Enabled
 -> AGP Enabled
 -> AGP 3.0 Mode
 -> Rate 8X
  IOBase: Address 0xEFFFF000
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BoardObject 0x1400FE04 Owner <pciusb.device>
Bridge <pci3> Bus 1 Dev 8 Function 0
 Vendor 0x106B <Apple Inc.> Device 0x40 <K2 KeyLargo USB>
  Revision 0x0 Class 0xC <Serial bus controller>
  ProgInterface 0x10 <OHCI>
  Command 0x6
   -> Memory Access
   -> Bus Mastering
  Status 0x200
  DevSel: Medium Devsel Speed
  IOBase: Address 0xDFFCE000
  Base 0: Address 0xDFFCD000 Size 0x1000
------------------------------------------------------
BoardObject 0x1400FF04 Owner <pciusb.device>
Bridge <pci3> Bus 1 Dev 9 Function 0
 Vendor 0x106B <Apple Inc.> Device 0x40 <K2 KeyLargo USB>
  Revision 0x0 Class 0xC <Serial bus controller>
  ProgInterface 0x10 <OHCI>
  Command 0x6
   -> Memory Access
   -> Bus Mastering
  Status 0x200
  DevSel: Medium Devsel Speed
  IOBase: Address 0xDFFCE000
  Base 0: Address 0xDFFCC000 Size 0x1000
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BoardObject 0x14010194 Owner <pciusb.device>
Bridge <pci4> Bus 2 Dev 11 Function 0
 Vendor 0x1033 <NEC Corporation> Device 0x35 <USB Controller>
  Revision 0x43 Class 0xC <Serial bus controller>
  ProgInterface 0x10 <OHCI>
  Command 0x6
   -> Memory Access
   -> Bus Mastering
  Status 0x210
   -> Capabilities List
  DevSel: Medium Devsel Speed
Cap_List: Head CapPtr 0x40
Cap_List: CapPtr 0xFE020001
Cap_List: CfgIndex 0x40
[0x1] PMC
 -> PME_Support 0x1F
 -> D2_SupportFW
 -> D1_SupportFW
 -> Aux_Current 0x0
 -> Version 0x2
PMCSR
 -> Data_Scale 0x0
 -> Data_Select 0x0
 -> PowerState 0x0
PMCSR_BSE
Data 0x0
  IOBase: Address 0xDFFCE000
  Base 0: Address 0xDFFCB000 Size 0x1000
------------------------------------------------------
BoardObject 0x14010254 Owner <pciusb.device>
Bridge <pci4> Bus 2 Dev 11 Function 1
 Vendor 0x1033 <NEC Corporation> Device 0x35 <USB Controller>
  Revision 0x43 Class 0xC <Serial bus controller>
  ProgInterface 0x10 <OHCI>
  Command 0x6
   -> Memory Access
   -> Bus Mastering
  Status 0x210
   -> Capabilities List
  DevSel: Medium Devsel Speed
Cap_List: Head CapPtr 0x40
Cap_List: CapPtr 0xFE020001
Cap_List: CfgIndex 0x40
[0x1] PMC
 -> PME_Support 0x1F
 -> D2_SupportFW
 -> D1_SupportFW
 -> Aux_Current 0x0
 -> Version 0x2
PMCSR
 -> Data_Scale 0x0
 -> Data_Select 0x0
 -> PowerState 0x0
PMCSR_BSE
Data 0x0
  IOBase: Address 0xDFFCE000
  Base 0: Address 0xDFFCA000 Size 0x1000
------------------------------------------------------
BoardObject 0x14010344 Owner <pciusb.device>
Bridge <pci4> Bus 2 Dev 11 Function 2
 Vendor 0x1033 <NEC Corporation> Device 0xE0 <uPD72010x USB 2.0 Controller>
  Revision 0x4 Class 0xC <Serial bus controller>
  ProgInterface 0x20 <EHCI>
  Command 0x6
   -> Memory Access
   -> Bus Mastering
  Status 0x210
   -> Capabilities List
  DevSel: Medium Devsel Speed
Cap_List: Head CapPtr 0x40
Cap_List: CapPtr 0xFE020001
Cap_List: CfgIndex 0x40
[0x1] PMC
 -> PME_Support 0x1F
 -> D2_SupportFW
 -> D1_SupportFW
 -> Aux_Current 0x0
 -> Version 0x2
PMCSR
 -> Data_Scale 0x0
 -> Data_Select 0x0
 -> PowerState 0x0
PMCSR_BSE
Data 0x0
  IOBase: Address 0xDFFCE000
  Base 0: Address 0xDFFC9000 Size 0x100
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BoardObject 0x14010544 Owner <ide.device>
Bridge <pci5> Bus 3 Dev 13 Function 0
 Vendor 0x106B <Apple Inc.> Device 0x43 <K2 ATA/100>
  Revision 0x0 Class 0xFF <Unassigned class>
  ProgInterface 0x0 <>
  Command 0x6
   -> Memory Access
   -> Bus Mastering
  Status 0x200
  DevSel: Medium Devsel Speed
  IOBase: Address 0xDFFCE000
  Base 0: Address 0xDFFC5000 Size 0x4000
------------------------------------------------------
BoardObject 0x14010674 Owner <>
Bridge <pci5> Bus 3 Dev 14 Function 0
 Vendor 0x106B <Apple Inc.> Device 0x42 <K2 FireWire>
  Revision 0x0 Class 0xC <Serial bus controller>
  ProgInterface 0x10 <OHCI>
  Command 0x0
  Status 0x290
   -> Capabilities List
   -> Fast Back-To-Back
  DevSel: Medium Devsel Speed
Cap_List: Head CapPtr 0x44
Cap_List: CapPtr 0x7E020001
Cap_List: CfgIndex 0x44
[0x1] PMC
 -> PME_Support 0xF
 -> D2_SupportFW
 -> D1_SupportFW
 -> Aux_Current 0x0
 -> Version 0x2
PMCSR
 -> Data_Scale 0x0
 -> Data_Select 0x0
 -> PowerState 0x0
PMCSR_BSE
Data 0x0
  IOBase: Address 0xDFFCE000
  Base 0: Address 0xDFFC4000 Size 0x1000
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BoardObject 0x1401089C Owner <sungem_eth.device>
Bridge <pci6> Bus 4 Dev 15 Function 0
 Vendor 0x106B <Apple Inc.> Device 0x4C <K2 GMAC (Sun GEM)>
  Revision 0x0 Class 0x2 <Network controller>
  ProgInterface 0x0 <>
  Command 0x16
   -> Memory Access
   -> Bus Mastering
   -> Memory Write & Invalidate
  Status 0x84A0
   -> 66 MHz Capable
   -> Fast Back-To-Back
   -> Detected Parity Error
  DevSel: Slow Devsel Speed
  IOBase: Address 0xDFFCE000
  Base 0: Address 0xDFDC4000 Size 0x200000
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BoardObject 0x14010AC4 Owner <ide.device>
Bridge <pci7> Bus 5 Dev 12 Function 0
 Vendor 0x1166 <Broadcom> Device 0x240 <K2 SATA>
  Revision 0x0 Class 0x1 <Mass storage controller>
  ProgInterface 0x8F <>
  Command 0x7
   -> I/O Access
   -> Memory Access
   -> Bus Mastering
  Status 0x200
  DevSel: Medium Devsel Speed
  IOBase: Address 0xDFFCE000
  Base 5: Address 0xDFCC2000 Size 0x2000